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MLT04 functional block diagram 18-lead epoxy dip (p suffix) 18-lead wide body soic (s suffix) rev. b general description the MLT04 is a complete, four-channel, voltage output analog multiplier packaged in an 18-pin dip or soic-18. these complete multipliers are ideal for general purpose applications such as voltage controlled amplifiers, variable active filters, zipper noise free audio level adjustment, and automatic gain control. other applica- tions include cost-effective multiple-channel power calculations (i v), polynomial correction generation, and low frequency modulation. the MLT04 multiplier is ideally suited for generating complex, high-order waveforms especially suitable for geometry correction in high-resolution crt display systems. features four independent channels voltage in, voltage out no external parts required 8 mhz bandwidth four-quadrant multiplication voltage output; w = (x y)/2.5 v 0.2% typical linearity error on x or y inputs excellent temperature stability: 0.005% 2.5 v analog input range operates from 5 v supplies low power dissipation: 150 mw typ spice model available applications geometry correction in high-resolution crt displays waveform modulation & generation voltage controlled amplifiers automatic gain control modulation and demodulation fabricated in a complementary bipolar process, the MLT04 includes four 4-quadrant multiplying cells which have been laser- trimmed for accuracy. a precision internal bandgap reference normalizes signal computation to a 0.4 scale factor. drift over temperature is under 0.005%/ c. spot noise voltage of 0.3 m v/ ? hz results in a thd + noise performance of 0.02% (lpf = 22 khz) for the lower distortion y channel. the four 8 mhz channels consume a total of 150 mw of quiescent power. the MLT04 is available in 18-pin plastic dip, and soic-18 surface mount packages. all parts are offered in the extended industrial temperature range (C40 c to +85 c). figure 2. thd + noise vs. frequency figure 1. gain & phase vs. frequency response 100 1 0.01 10 100 1m 100k 10k 1k 0.1 10 frequency ?hz thd + noise ?% v cc = +5v v ee = ?v t a = +25? thdx: x = 2.5vp, y = +2.5v dc thdy: y = 2.5vp, x = +2.5v dc lpf = 500khz 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 mlt-04 18 17 16 15 14 13 12 11 10 4 1 2 3 5 6 7 8 9 MLT04 w4 gnd4 x4 v ee y4 y3 x3 gnd3 w3 w1 gnd1 x1 y1 v cc y2 x2 gnd2 w2 w = (x y)/2.5v av gain ?db 0 1k 10k 100m 10m 1m 100k 20 40 ?0 ?0 frequency ?hz 0 90 ?0 ?phase degrees v cc = +5v v ee = ?v t a = +25 c x & y measurements superimposed: x = 100mv rms, y = 2.5v dc y = 100mv rms, x = 2.5v dc av (x or y) (x or y) 8.9mhz ?db one technology way, p.o. box 9106, norwood. ma 02062-9106, u.s.a. tel: 617/329-4700 fax: 617/326-8703 a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. four-channel, four-quadrant analog multiplier
ordering information* temperature package package model range description option MLT04gp C40 c to +85 c 18-pin p-dip n-18 MLT04gs C40 c to +85 c 18-lead soic sol-18 MLT04gs-reel C40 c to +85 c 18-lead soic sol-18 MLT04gbc +25 c die *for die specifications contact your local analog sales office. the MLT04 contains 211 transistors. (v cc = +5 v, v ee = C5 v, v in = 2.5 v p , r l = 2 k w , t a = +25 c unless otherwise noted.) C2C MLT04Cspecifications parameter symbol conditions min typ max units multiplier performance 1 total error 2 xe x C2.5 v < x < +2.5 v, y = +2.5 v C5 2 5 % fs total error 2 ye y C2.5 v < y < +2.5 v, x = +2.5 v C5 2 5 % fs linearity error 2 xle x C2.5 v < x < +2.5 v, y = +2.5 v C1 0.2 +1 % fs linearity error 2 yle y C2.5 v < y < +2.5 v, x = +2.5 v C1 0.2 +1 % fs total error drift tce x x = C2.5 v, y = 2.5 v, t a = C40 c to +85 c 0.005 %/ c total error drift tce y y = C2.5 v, x = 2.5 v, t a = C40 c to +85 c 0.005 %/ c scale factor 3 k x = 2.5 v, y = 2.5 v, t a = C40 c to +85 c 0.38 0.40 0.42 1/v output offset voltage z os x = 0 v, y = 0 v, t a = C40 c to +85 c C50 10 50 mv output offset drift tcz os x = 0 v, y = 0 v, t a = C40 c to +85 c50 m v/ c offset voltage, x x os x = 0 v, y = 2.5 v, t a = C40 c to +85 c C50 10.5 50 mv offset voltage, y y os y = 0 v, x = 2.5 v, t a = C40 c to +85 c C50 10.5 50 mv dynamic performance small signal bandwidth bw v out = 0.1 v rms 8 mhz slew rate sr v out = 2.5 v 30 53 v/ m s settling time t s v out = d 2.5 v to 1% error band 1 m s ac feedthrough ft ac x = 0 v, y = 1 v rms @ f = 100 khz C65 db crosstalk @ 100 khz ct ac x = y = 1 v rms applied to adjacent channel C90 db outputs audio band noise e n f = 10 hz to 50 khz 76 m v rms wide band noise e n noise bw = 1.9 mhz 380 m v rms spot noise voltage e n f = 1 khz 0.3 m v/ ? hz total harmonic distortion thd x f = 1 khz, lpf = 22 khz, y = 2.5 v 0.1 % thd y f = 1 khz, lpf = 22 khz, x = 2.5 v 0.02 % open loop output resistance r out 40 w voltage swing v pk v cc = +5 v, v ee = C5 v 3.0 3.3 v p short circuit current i sc 30 ma inputs analog input range ivr gnd = 0 v C2.5 +2.5 v bias current i b x = y = 0 v 2.3 10 m a resistance r in 1m w capacitance c in 3pf square performance total square error e sq x = y = 1 5 % fs power supplies positive current i cc v cc = 5.25 v, v ee = C5.25 v 15 20 ma negative current i ee v cc = 5.25 v, v ee = C5.25 v 15 20 ma power dissipation p diss calculated = 5 v i cc + 5 v i ee 150 200 mw supply sensitivity pssr x = y = 0 v, v cc = d 5% or v ee = d 5% 10 mv/v supply voltage range v range for v cc & v ee 4.75 5.25 v rev. b notes 1 specifications apply to all four multipliers. 2 error is measured as a percent of the 2.5 v full scale, i.e., 1% fs = 25 mv. 3 scale factor k is an internally set constant in the multiplier transfer equation w = k x y. specifications subject to change without notice. absolute maximum ratings* supply voltages v cc , v ee to gnd 7 v inputs x i , y i v cc , v ee outputs w i v cc , v ee operating temperature range C40 c to +85 c maximum junction temperature (t j max) +150 c storage temperature C65 c to +150 c lead temperature (soldering, 10 sec) +300 c package power dissipation (t j maxCt a )/ q ja thermal resistance q ja pdip-18 (n-18) 74 c/w soic-18 (sol-18) 89 c/w *stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification are not implied.
C3C rev. b functional description the MLT04 is a low cost quad, 4-quadrant analog multiplier with single-ended voltage inputs and voltage outputs. the functional block diagram for each of the multipliers is illustrated in figure 3. due to packaging constraints, access to internal nodes for externally adjusting scale factor, output offset voltage, or additional summing signals is not provided. figure 3. functional block diagram of each MLT04 multiplier each of the MLT04s analog multipliers is based on a gilbert cell multiplier configuration, a 1.23 v bandgap reference, and a unity- connected output amplifier. multiplier scale factor is determined through a differential pair/trimmable resistor network external to the core. an equivalent circuit for each of the multipliers is shown in figure 4. figure 4. equivalent circuit for the MLT04 details of each multipliers output-stage amplifier are shown in figure 5. the output stages idles at 200 m a, and the resistors in series with the emitters of the output stage are 25 w . the output stage can drive load capacitances up to 500 pf without oscillation. for loads greater than 500 pf, the outputs of the MLT04 should be isolated from the load capacitance with a 100 w resistor. figure 5. equivalent circuit for MLT04 output stages analog multiplier error sources multiplier errors consist primarily of input and output offsets, scale factor errors, and nonlinearity in the multiplying core. an expres- sion for the output of a real analog multiplier is given by: v o = ( k +d k ){( v x + x os )( v y + y os ) + z os + f ( x , y )} where: k = multiplier scale factor d k = scale factor error v x = x-input signal x os = x-input offset voltage v y = y-input signal y os = y-input offset voltage z os = multiplier output offset voltage ?(x , y ) = nonlinearity executing the algebra to simplify the above expression yields expressions for all the errors in an analog multiplier: term description dependence on input kv x v y true product goes to zero as either or both inputs go to zero d kv y v y scale-factor error goes to zero at v x , v y = 0 v x y os linear x feedthrough proportional to v x due to y-input offset v y x os linear y feedthrough proportional to v y due to x-input offset x os y os output offset due to x-, independent of v x , v y y-input offsets z os output offset independent of v x , v y ?(x, y) nonlinearity depends on both v x , v y . contains terms dependent on v x , v y , their powers and cross products as shown in the table, the primary static errors in an analog multiplier are input offset voltages, output offset voltage, scale factor, and nonlinearity. of the four sources of error, only two are externally trimmable in the MLT04: the x- and y-input offset voltages. output offset voltage in the MLT04 is factory-trimmed to 50 mv, and the scale factor is internally adjusted to 2.5% of full scale. input offset voltage errors can be eliminated by using the optional trim circuit of figure 6. this scheme then reduces the net error to output offset, scale-factor (gain) error, and an irreducible nonlinearity component in the multiplying core. figure 6. optional offset voltage trim configuration MLT04 v cc v ee w out 25 w 25 w v cc internal bias x in gnd y in v ee w out 22k 200? 200? 22k 22k 200? 200? 200? 200? scale factor 50k w ? s 50k w +v s ?00mv for x os , y os trim connect to sum node of an ext op amp i 0.4 +v s ? s x1, x2, x3, x4 g1, g2, g3, g4 y1, y2, y3, y4 w1, w2, w3, w4 MLT04
figure 12. y-input nonlinearity @ x = C2.5 v feedthrough in the ideal case, the output of the multiplier should be zero if either input is zero. in reality, some portion of the nonzero input will feedthrough the multiplier and appear at the output. this is caused by the product of the nonzero input and the offset voltage of the zero input. introducing an offset equal to and opposite of the zero input offset voltage will null the linear component of the feedthrough. residual feedthrough at the output of the multiplier is then irreducible core nonlinearity. typical x- and y-input feedthrough curves for the MLT04 are shown in figures 7 and 8, respectively. these curves illustrate MLT04 feedthrough after zero input offset voltage trim. residual x-input feedthrough measures 0.08% of full scale, whereas residual y-input feedthrough is almost immeasurable. figure 7. x-input feedthrough with y os nulled figure 8. y-input feedthrough with x os nulled nonlinearity multiplier core nonlinearity is the irreducible component of error. it is the difference between actual performance and best-straight- line theoretical output, for all pairs of input values. it is expressed as a percentage of full scale with all other dc errors nulled. typical x- and y-input nonlinearities for the MLT04 are shown in figures 9 through 12. worst-case x-input nonlinearity measured less than 0.2%, and y-input nonlinearity measured better than 0.06%. for modulator/demodulator or mixer applications it is, therefore, recommended that the carrier be connected to the x-input while the signal is applied to the y-input. rev. b figure 10. x-input nonlinearity @ y = C2.5 v figure 11. y-input nonlinearity @ x = +2.5 v MLT04 figure 9. x-input nonlinearity @ y = +2.5 v 100 90 10 0% vertical ?5mv/div horizontal ?0.5v/div y-input: ?.5v @ 10hz x os nulled t a = +25? 100 90 10 0% vertical ?5mv/div horizontal ?0.5v/div x-input: ?.5v @ 10hz y-input: +2.5v y os nulled t a = +25? 100 90 10 0% vertical ?5mv/div horizontal ?0.5v/div x-input: ?.5v @ 10hz y os nulled t a = +25? 100 90 10 0% vertical ?5mv/div horizontal ?0.5v/div x-input: ?.5v @ 10hz y-input: ?.5v y os nulled t a = +25? 100 90 10 0% vertical ?5mv/div horizontal ?0.5v/div y-input: ?.5v @ 10hz x-input: +2.5v x os nulled t a = +25? 100 90 10 0% vertical ?5mv/div horizontal ?0.5v/div y-input: ?.5v @ 10hz x-input: ?.5v x os nulled t a = +25? C4C
typical performance characteristics C MLT04 C5C rev. b figure 16. x-input gain and phase vs. frequency figure 17. y-input gain and phase vs. frequency figure 18. amplitude response vs. capacitive load figure 15. noise density vs. frequency 10000 1000 0 100 noise density ?nv/ hz frequency ?hz 10 100 1m 100k 10k 1k v s = ?v t a = +25 c 10k 100k 10m 1m ?2 12 0 ? 6 9 3 ? ? 180 0 ?0 90 135 45 ?5 ?35 ?80 t a = +25 c v s = ?v v x = 100mv v y = +2.5v gain phase phase = 68.3 @ 7.142 mhz frequency ?hz gain ?b phase ?degrees frequency ?hz 1k 10k 100m 10m 1m 100k 8 ? ?2 0 2 4 6 ?0 ? ? ? av gain ?db c l = 320pf c l = 560pf c l = 220pf no c l c l = 100pf v s = ?v r l = 2k t a = +25? figure 13. broadband noise output noise voltage ?100?/div time = 10ms/div nbw = 10hz ?0khz t a = +25? 100 10 0% 90 figure 14. broadband noise output noise voltage ?625?/div time = 10ms/div nbw = 1.9mhz t a = +25? 100 10 0% 90 10k 100k 10m 1m ?2 12 0 ? 6 9 3 ? ? 180 0 ?0 90 135 45 ?5 ?35 ?80 t a = +25 c v s = 5v v x = +2.5v v y = 100mv gain phase phase = 68.1 @ 8.064 mhz frequency ?hz gain ?b phase ?degrees
C6C rev. b MLT04 C typical performance characteristics figure 19. feedthrough vs. frequency figure 20. crosstalk vs. frequency figure 21. gain flatness vs. frequency 0 ?0 ?00 10k 3m 1m 100k 1k ?0 ?0 ?0 feedthrough ?db frequency ?hz v x = 0v v y = 1v pk v s = ?v t a = +25 c v y = 0v v x = 1v pk 10k 10m 1m 100k 1k 0 ?0 ?20 ?0 ?00 ?0 ?0 t a = 25? v s = ?v v x = ?.5v pk v y = +2.5vdc crosstalk ?db frequency ?hz 2.0 ?.5 ?.0 1k 10k 100m 10m 1m 100k 0 0.5 1.0 1.5 ?.5 ?.0 ?.5 ?.0 frequency ?hz av gain ?db y = 100mv rms x = 2.5vdc w v s = ?v r l = 2k w t a = +25? x = 100mv rms y = 2.5vdc vertical ?50mv/div time ?100ns/div w x-input = +2.5v r l = 10k w t a = +25 c 90 100 10 0% vertical ?50mv/div time ?100ns/div w x-input = +2.5v r l = 10k w t a = +25 c 90 100 10 0% time = 100ns/div vertical ?1v/div w x-input: +2.5v r l = 10k w t a = +25 c 90 100 10 0% time = 100ns/div vertical ?1v/div w x-input: +2.5v r l = 10k w t a = +25 c 90 100 10 0% figure 22. y-input small-signal transient response, c l = 30 pf figure 23. y-input small-signal transient response, c l = 100 pf figure 24. y-input large-signal transient re- sponse, c l = 30 pf figure 25. y-input large-signal transient response, c l = 100 pf
rev. b C7C figure 26. thd + noise vs. input signal level figure 27. linearity error vs. temperature figure 28. x-input gain bandwidth vs. temperature figure 29. y-input gain bandwidth vs. temperature figure 30. maximum output swing vs. frequency figure 31. maximum output swing vs. resistive load MLT04 1 0.01 0.001 0.1 0.1 1 10 input signal level volts p-p thd + noise ?% y-input x = +2.5vdc x-input y = +2.5vdc w v s = ?v r l = 2k w t a = +25 c f o = 1khz flpf = 22khz 0.3 ?.3 0 ?.2 ?.1 0.2 0.1 125 ?0 ?5 100 50 25 0 75 ?5 v x = +2.5v, ?.5v v y +2.5v v y = +2.5v, ?.5v v x +2.5v v s = ?v temperature ? c linearty error ?% ?5 125 ?0 9 5 8 6 7 75 100 50 25 0 ?5 phase @ ?db bw ?degrees ?db-bandwidth ?mhz 80 60 75 65 70 temperature ? c v s = ?v v x = 100mv v y = +2.5v ?db bw phase @ ?db bw ?5 125 ?0 9 5 8 6 7 75 100 50 25 0 ?5 80 60 75 65 70 v s = ?v v x = +2.5v v y = 100mv phase @ ?db bw ?degrees ?db-bandwidth ?mhz temperature ? c ?db bw phase @ ?db bw 4.5 4.0 0 10 100 10k 1k 1.5 1.0 0.5 2.0 2.5 3.0 3.5 w load resistance ? w output swing ?volts v s = ?v t a = +25? positive swing negative swing 10k 10m 1m 100k 1k frequency ?hz 4 0 2 6 5 3 1 7 8 maximum output swing ?volts p-p w t a = +25 c r l = 2k w v s = 5v 1% distortion
C8C rev.b figure 33. offset voltage vs. temperature figure 32. offset voltage distribution figure 34. scale factor distribution figure 35. scale factor vs. temperature figure 36. output offset voltage (z os ) distribution figure 37. output offset voltage (z os ) vs. temperature MLT04 12.5 ?0 ?2.5 10 5 2.5 0 7.5 ?.5 ? ?.5 offset voltage ?mv 0 300 150 50 100 250 200 units t a = +25 c v s = ?v x = ?.5v x os @ y = ?.5v y os @ x = ?.5v ss = 1000 multipliers 6 ? 0 ? ? 4 2 v s = ?v x os , y = ?.5v y os , x = ?.5v v os ?mv 125 ?0 ?5 100 50 25 075 ?5 temperature ? c 0.415 0.3975 0.395 0.4125 0.410 0.4075 0.405 0.4025 0.400 scale factor ?1/v 0 400 100 50 200 150 250 300 350 units t a = +25? v s = ?v ss = 1000 multipliers 125 ?0 ?5 100 75 50 25 0 ?5 temperature ? c 0.407 0.402 0.405 0.403 0.404 0.406 scale factor ?1/v v s = ?v no load 15 ?2 ?5 12 9 6 3 0 ? ? ? output offset voltage ?mv 0 100 50 200 150 250 300 400 350 units t a = +25? v s = ?v v x = v y = 0v ss = 1000 multipliers ?5 125 ?0 75 100 50 25 0 ?5 temperature ? c 10 ?0 5 ? 0 output offset voltage ?mv v s = ?v
C9C rev. b figure 39. power supply rejection vs. frequency figure 38. supply current vs. temperature MLT04 ?5 125 ?0 75 100 50 25 0 ?5 temperature ? c 17 13 16 14 15 supply current ?ma v s = ?v no load v x = v y = 0 1k 1m 100k 10k 100 frequency ?hz 0 100 60 40 20 80 power supply rejection ?db t a = +25 c v s = ?v +psrr ?srr ?.25 1.25 ?.50 ?.0 ?.75 0.25 ?.25 0 0.50 1.0 200 0 1000 800 600 400 1.25 0 1.0 s x +3 s x s x ? s linearity error ?% 0.75 hours of operation at +125 c figure 41. output voltage offset (z os ) distribution accelerated by burn-in figure 40. linearity error (le) distribution accelerated by burn-in figure 42. scale factor (k) distribution acceler- ated by burn-in 200 0 1000 800 600 400 hours of operation at +125 c ?5 15 ? ?2 ? 3 ? 0 6 9 12 output voltage offset ?mv s x +3 s x s x ? s s x ? s 200 0 1000 800 600 400 hours of operation at +125 c 0.384 0.424 0.396 0.388 0.392 0.408 0.400 0.404 0.412 0.416 0.420 scale factor ?1/v s x +3 s x
C10C rev. b applications the MLT04 is well suited for such applications as modulation/ demodulation, automatic gain control, power measurement, analog computation, voltage-controlled amplifiers, frequency doublers, and geometry correction in crt displays. multiplier connections figure 43 llustrates the basic connections for multiplication. each of the four independent multipliers has single-ended voltage inputs (x, y) and a low impedance voltage output (w). also, each multiplier has its own dedicated ground connection (gnd) which is connected to the circuits analog common. for best perfor- mance, circuit layout should be compact with short component leads and well-bypassed supply voltage feeds. in applications where fewer than four multipliers are used, all unused analog inputs must be returned to the analog common. figure 43. basic multiplier connections squaring and frequency doubling as shown in figure 44, squaring of an input signal, v in , is achieved by connecting the x-and y-inputs in parallel to produce an output of v in 2 /2.5 v. the input may have either polarity, but the output will be positive. figure 44. connections for squaring when the input is a sine wave given by v in sin w t, the squaring circuit behaves as a frequency doubler because of the trigonometric identity: ( v in sin w t ) 2 2. 5 v = v in 2 2. 5 v 1 2 ? ? ? ? (1 - cos 2 w t ) the equation shows a dc term at the output which will vary strongly with the amplitude of the input, v in . the output dc offset can be eliminated by capacitively coupling the MLT04s output with a high-pass filter. for optimal spectral performance, the filters cutoff frequency should be chosen to eliminate the input fundamental frequency. a source of error in this configuration is the offset voltages of the x and y inputs. the input offset voltages produce cross products with the input signal to distort the output waveform. to circum- vent this problem, figure 45 illustrates the use of inverting amplifiers configured with an op285 to provide a means by which the x- and y-input offsets can be trimmed. figure 45. frequency doubler with input offset voltage trims feedback divider connections the most commonly used analog divider circuit is the inverted multiplier configuration. as illustrated in figure 46, an inverted multiplier analog divider can be configured with a multiplier operating in the feedback loop of an operational amplifier. the general form of the transfer function for this circuit configuration is given by: v o =- 2. 5 v r 2 r 1 ? ? ? ? v in v x here, the multiplier operates as a voltage-controlled potentiometer that adjusts the loop gain of the op amp relative to a control signal, v x . as the control signal to the multiplier decreases, the output of the multiplier decreases as well. this has the effect of reducing negative feedback which, in turn, decreases the amplifiers loop gain. the result is higher closed-loop gain and reduced circuit bandwidth. as v x is increased, the output of the multiplier increases which generates more negative feedback closed-loop gain drops and circuit bandwidth increases. an example of an inverted multiplier analog divider frequency response is shown in figure 47. MLT04 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 18 17 16 15 14 13 12 11 10 4 1 2 3 5 6 7 8 9 MLT04 w4 gnd4 x4 v ee y4 y3 x3 gnd3 w3 w1 gnd1 x1 y1 v cc y2 x2 gnd2 w2 w4 x4 y4 y3 x3 w3 0.1? ?v 0.1? w1 x1 y1 y2 x2 w 1? = 0.4 (x 1? y 1? ) w2 +5v 0.4 +5v ?v x gnd y w 1/4 MLT04 v in 0.1? 0.1? w = 0.4 v in 2 + + w r l 10k w c1 100pf 1/4 MLT04 0.4 3 2 1 w1 4 + + v o 2 3 1 a1 a1, a2 = 1/2 op285 + r2 10k w r5 500k w w p1 50k w r1 10k +5v ?v 6 5 7 a2 + r4 10k w r6 500k w w p2 50k w r3 10k +5v ?v v in y os trim x os trim
C11C rev. b figure 46. inverted-multiplier configuration for analog division figure 47. signal-dependent feedback makes variables out of amplifier bandwidth and stability although this technique works well with almost any operational amplifier, there is one caveat: for best circuit stability, the unity- gain crossover frequency of the operational amplifier should be equal to or less than the MLT04s 8 mhz bandwidth. connection for square rooting another application of the inverted multiplier configuration is the square-root function. as shown in figure 48, both inputs of the MLT04 are wired together and are used as the output of the circuit. because the circuit configuration exhibits the following generalized transfer function: v o =- 2. 5 r 2 r 1 ? ? ? ? v in the input signal voltage is limited to the range C2.5 v v in < 0. to prevent circuit latchup due to positive feedback or input signal polarity reversal, a 1n4148-type junction diode is used in series with the output of the multiplier. figure 48. connections for square rooting voltage-controlled low-pass filter the circuit in figure 49 illustrates how to construct a voltage- controlled low-pass filter with an analog multiplier. the advantage with this approach over conventional active-filter configurations is that the overall characteristic cut-off frequency, w o , will be directly proportional to a multiplying input voltage. this permits the construction of filters in which the capacitors are adjustable (directly or inversely) by a control voltage. hence, the frequency scale of a filter can be manipulated by means of a single voltage without affecting any other parameters. the general form of the circuits transfer function is given by: v o v in =- r 2 r 1 ? ? ? ? 1 s r 2 + r 1 r 1 ? ? ? ? 2. 5 rc v x ? ? ? ? + 1 y ? ? t ? ? ? ? ? ? ? in this circuit, the ratio of r2 to r1 sets the passband gain, and the break frequency of the filter, w lp , is given by: w lp = r 1 r 1 + r 2 ? ? ? ? v x 2. 5 rc ? ? ? ? figure 49. a voltage-controlled low-pass filter for example, if r1 = r2 = 10 k w , r = 10 k w , and c = 80 pf, MLT04 v o v in r1 10k r2 10k 1/4 MLT04 0.4 3 2 4 1 gnd1 y1 x1 w1 2 6 3 op113 v x v o = ?.5v ? v in v x + + + + 90 40 100 1k 10m 1m 100k 10k 50 60 70 80 0 10 20 30 frequency ?hz gain ?db a vol op113 v x = 0.025v v x = 0.25v v x = 2.5v v o v in r1 10k r2 10k 1/4 MLT04 0.4 3 2 4 1 y1 x1 w1 6 op113 d1 1n4148 v o = ?.5v ?v in 2 3 + c 80pf r2 10k r 10k r1 10k 1/4 MLT04 0.4 3 2 1 v o y1 x1 w1 2 3 1 a1 4 a1 = 1/2 op285 v in gnd1 v x f lp =; f lp = max @ v x = 2.5v v x p 10 p rc = 1 1 + s 5rc v x v o v in + + + +
C12C rev. b outline dimensions dimensions shown in inches and (mm). 18-lead epoxy dip (p suffix) 18-lead wide-body sol (s suffix) then the output of the circuit has a pole at frequencies from 1 khz to 100 khz for v x ranging from 25 mv to 2.5 v. the performance of this low-pass filter is illustrated in figure 20. figure 50. low-pass cutoff frequency vs. control voltage, v x with this approach, it is possible to construct parametric biquad filters whose parameters (center frequency, passband gain, and q) can be adjusted with dc control voltages. MLT04 30 0 ?30 ?10 20 10 ?20 10 100 10m 1m 100k 10k 1k frequency ?hz gain ?db v x = 0.025v 2.5v 0.25v pin 1 0.280 (7.11) 0.240 (6.10) 18 1 9 10 0.210 (5.33) max 0.160 (4.06) 0.115 (2.93) 0.022 (0.558) 0.014 (0.356) 0.100 (2.54) bsc 0.070 (1.77) 0.045 (1.15) seating plane 0.130 (3.30) min 0.925 (23.49) 0.845 (21.47) 0.015 (0.38) min 0.325 (8.25) 0.300 (7.62) 0.015 (0.38) 0.008 (0.20) 15 0 pin 1 0.2992 (7.60) 0.2914 (7.40) 0.4193 (10.65) 0.3937 (10.00) 1 18 10 9 0.4625 (11.75) 0.4469 (11.35) 0.0192 (0.49) 0.0138 (0.35) 0.0500 (1.27) bsc 0.1043 (2.65) 0.0926 (2.35) 0.0118 (0.30) 0.0040 (0.10) 0.0125 (0.32) 0.0091 (0.23) 0.0500 (1.27) 0.0157 (0.40) 8 0 0.0291 (0.74) 0.0098 (0.25) x 45 printed in u.s.a. c1845C18C10/93

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